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file '%s': %scannot create new phdr for file '%s': %scouldn't create new section: %scouldn't create new section data: %scannot determine number of sections: %sCannot remove allocated section '%s'while generating output file: %s%s: error while updating ELF header: %s%s: error while getting shdrstrndx: %s%s: error updating shdrstrndx: %swhile preparing output for '%s'while create section header section: %scannot allocate section data: %swhile create section header string table: %sno memory to create section header string tableCannot remove symbol [%zd] from allocated symbol table [%zd]while computing checksum for debug information%s: error while creating ELF header: %s%s: error while reading the file: %serror while finishing '%s': %scannot set access and modification date of '%s'Cannot both keep and remove section '%s'%s: cannot use -o or -f when stripping archive%s: no support for stripping archive%s: File format not recognized--reloc-debug-sections used without -f--reloc-debug-sections-only incompatible with -f, -g, --remove-comment and --remove-sectionOnly one input file allowed together with '-o' and '-f'Place stripped output into FILEExtract the removed sections into FILEEmbed name FILE instead of -f argumentRemove section headers (not recommended)Copy modified/access timestamps to the outputResolve all trivial relocations between debug sections if the removed sections are placed in a debug file (only relevant for ET_REL files, operation is not reversible, needs -f)Similar to --reloc-debug-sections, but resolve all trivial relocations between debug sections in place. No other stripping is performed (operation is not reversible, incompatible with -f, -g, --remove-comment and --remove-section)Remove the named section. SECTION is an extended wildcard pattern. May be given more than once. Only non-allocated sections can be removed.Keep the named section. SECTION is an extended wildcard pattern. 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FPAVFPslpprcorig_r0fpscr @ `` @ bswphalfthumb26bitfast-multfpavfpedspjavaiwmmxtaeabiCPU_raw_nameCPU_nameCPU_archCPU_arch_profileApplicationRealtimeMicrocontrollerARM_ISA_useTHUMB_ISA_useWMMX_archAdvanced_SIMD_archPCS_configABI_PCS_R9_useABI_PCS_RW_dataABI_PCS_RO_dataABI_PCS_GOT_useABI_PCS_wchar_tABI_FP_roundingABI_FP_denormalABI_FP_exceptionsABI_FP_user_exceptionsABI_FP_number_modelABI_align8_neededABI_align8_preservedABI_enum_sizeABI_HardFP_useABI_VFP_argsABI_WMMX_argsABI_optimization_goalsABI_FP_optimization_goalsCPU_unaligned_accessVFP_HP_extensionABI_FP_16bit_formatnodefaultsalso_compatible_withT2EE_useconformanceVirtualization_useMPextension_useNoneIEEE 754Alternative FormatNot Allowedv6Prefer SpeedAggressive SpeedPrefer SizeAggressive SizePrefer AccuracyAggressive AccuracyPrefer DebugAggressive DebugAAPCSWMMX registerscustomVFP registersas VFP_archSP onlyDP onlySP and DPUnusedsmallforced to intNoYes, except leaf SPYes4-byteFiniteRTABINeededSign onlyGOT-indirectAbsolutePC-relativeSB-relativeV6SBTLSBare platformLinux applicationLinux DSOPalmOS 2004PalmOS (reserved)SymbianOS 2004SymbianOS (reserved)NEONv1WMMXv1WMMXv2VFPv1VFPv2VFPv3VFPv3-D16Thumb-1Thumb-2Pre-v4v4Tv5Tv5TEv5TEJv6KZv6T2v6Kv7v6-Mv6S-MJpKK0KKKKL@LpLLLM0M`MpMMMN0N`NNNN OPOOOJJOJPJ@PJJJJJJJJJJJJJJJJJJJJJJJJJpPPPPPJJRPPRNQRRRRRRRRRRNQNQRRPRRRPRRRRRRRNQRQRRNQRRRRRRRRRRRRRRRRRRRRRRRRRRRRRNQpPQRS     dynamic symbols use segment indexmapping symbols precede otherssorted symbol tablessoft-float ABIhard-float ABIBE8LE8interworking enableduses APCS/26uses APCS/floatposition independent8 bit structure alignmentuses new ABIuses old ABIsoftware FPMaverick FPVersion1 EABIVersion2 EABIVersion3 EABIVersion4 EABIVersion5 EABIaarch64_reloc_valid_use #=Tn*Ec} 3DUl4Mi'B^y5Mh#Cc9_ 8 \  A `   - O t  = Z v !0CWjR_AARCH64_ABS64R_AARCH64_ABS32R_AARCH64_COPYR_AARCH64_GLOB_DATR_AARCH64_JUMP_SLOTR_AARCH64_RELATIVER_AARCH64_TLS_DTPMODR_AARCH64_TLS_DTPRELR_AARCH64_TLS_TPRELR_AARCH64_TLSDESCR_AARCH64_NONER_AARCH64_ABS16R_AARCH64_PREL64R_AARCH64_PREL32R_AARCH64_PREL16R_AARCH64_MOVW_UABS_G0R_AARCH64_MOVW_UABS_G0_NCR_AARCH64_MOVW_UABS_G1R_AARCH64_MOVW_UABS_G1_NCR_AARCH64_MOVW_UABS_G2R_AARCH64_MOVW_UABS_G2_NCR_AARCH64_MOVW_UABS_G3R_AARCH64_MOVW_SABS_G0R_AARCH64_MOVW_SABS_G1R_AARCH64_MOVW_SABS_G2R_AARCH64_LD_PREL_LO19R_AARCH64_ADR_PREL_LO21R_AARCH64_ADR_PREL_PG_HI21R_AARCH64_ADR_PREL_PG_HI21_NCR_AARCH64_ADD_ABS_LO12_NCR_AARCH64_LDST8_ABS_LO12_NCR_AARCH64_LDST16_ABS_LO12_NCR_AARCH64_LDST32_ABS_LO12_NCR_AARCH64_LDST64_ABS_LO12_NCR_AARCH64_LDST128_ABS_LO12_NCR_AARCH64_TSTBR14R_AARCH64_CONDBR19R_AARCH64_JUMP26R_AARCH64_CALL26R_AARCH64_MOVW_PREL_G0R_AARCH64_MOVW_PREL_G0_NCR_AARCH64_MOVW_PREL_G1R_AARCH64_MOVW_PREL_G1_NCR_AARCH64_MOVW_PREL_G2R_AARCH64_MOVW_PREL_G2_NCR_AARCH64_MOVW_PREL_G3R_AARCH64_MOVW_GOTOFF_G0R_AARCH64_MOVW_GOTOFF_G0_NCR_AARCH64_MOVW_GOTOFF_G1R_AARCH64_MOVW_GOTOFF_G1_NCR_AARCH64_MOVW_GOTOFF_G2R_AARCH64_MOVW_GOTOFF_G2_NCR_AARCH64_MOVW_GOTOFF_G3R_AARCH64_GOTREL64R_AARCH64_GOTREL32R_AARCH64_GOT_LD_PREL19R_AARCH64_LD64_GOTOFF_LO15R_AARCH64_ADR_GOT_PAGER_AARCH64_LD64_GOT_LO12_NCR_AARCH64_LD64_GOTPAGE_LO15R_AARCH64_TLSGD_ADR_PREL21R_AARCH64_TLSGD_ADR_PAGE21R_AARCH64_TLSGD_ADD_LO12_NCR_AARCH64_TLSGD_MOVW_G1R_AARCH64_TLSGD_MOVW_G0_NCR_AARCH64_TLSLD_ADR_PREL21R_AARCH64_TLSLD_ADR_PAGE21R_AARCH64_TLSLD_ADD_LO12_NCR_AARCH64_TLSLD_MOVW_G1R_AARCH64_TLSLD_MOVW_G0_NCR_AARCH64_TLSLD_LD_PREL19R_AARCH64_TLSLD_MOVW_DTPREL_G2R_AARCH64_TLSLD_MOVW_DTPREL_G1R_AARCH64_TLSLD_MOVW_DTPREL_G1_NCR_AARCH64_TLSLD_MOVW_DTPREL_G0R_AARCH64_TLSLD_MOVW_DTPREL_G0_NCR_AARCH64_TLSLD_ADD_DTPREL_HI12R_AARCH64_TLSLD_ADD_DTPREL_LO12R_AARCH64_TLSLD_ADD_DTPREL_LO12_NCR_AARCH64_TLSLD_LDST8_DTPREL_LO12R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NCR_AARCH64_TLSLD_LDST16_DTPREL_LO12R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NCR_AARCH64_TLSLD_LDST32_DTPREL_LO12R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NCR_AARCH64_TLSLD_LDST64_DTPREL_LO12R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NCR_AARCH64_TLSLD_LDST128_DTPREL_LO12R_AARCH64_TLSLD_LDST128_DTPREL_LO12_NCR_AARCH64_TLSIE_MOVW_GOTTPREL_G1R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NCR_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NCR_AARCH64_TLSIE_LD_GOTTPREL_PREL19R_AARCH64_TLSLE_MOVW_TPREL_G2R_AARCH64_TLSLE_MOVW_TPREL_G1R_AARCH64_TLSLE_MOVW_TPREL_G1_NCR_AARCH64_TLSLE_MOVW_TPREL_G0R_AARCH64_TLSLE_MOVW_TPREL_G0_NCR_AARCH64_TLSLE_ADD_TPREL_HI12R_AARCH64_TLSLE_ADD_TPREL_LO12R_AARCH64_TLSLE_ADD_TPREL_LO12_NCR_AARCH64_TLSLE_LDST8_TPREL_LO12R_AARCH64_TLSLE_LDST8_TPREL_LO12_NCR_AARCH64_TLSLE_LDST16_TPREL_LO12R_AARCH64_TLSLE_LDST16_TPREL_LO12_NCR_AARCH64_TLSLE_LDST32_TPREL_LO12R_AARCH64_TLSLE_LDST32_TPREL_LO12_NCR_AARCH64_TLSLE_LDST64_TPREL_LO12R_AARCH64_TLSLE_LDST64_TPREL_LO12_NCR_AARCH64_TLSLE_LDST128_TPREL_LO12R_AARCH64_TLSLE_LDST128_TPREL_LO12_NCR_AARCH64_TLSDESC_LD_PREL19R_AARCH64_TLSDESC_ADR_PREL21R_AARCH64_TLSDESC_ADR_PAGE21R_AARCH64_TLSDESC_LD64_LO12R_AARCH64_TLSDESC_ADD_LO12R_AARCH64_TLSDESC_OFF_G1R_AARCH64_TLSDESC_OFF_G0_NCR_AARCH64_TLSDESC_LDRR_AARCH64_TLSDESC_ADDR_AARCH64_TLSDESC_CALLx%delrFP/SIMDv%d.got.got.pltAARCH64_BTI_PLTAARCH64_PAC_PLTAARCH64_VARIANT_PCS pstatedbg_infoDBGWVR0_EL1DBGWCR0_EL1DBGWVR1_EL1DBGWCR1_EL1DBGWVR2_EL1DBGWCR2_EL1DBGWVR3_EL1DBGWCR3_EL1DBGWVR4_EL1DBGWCR4_EL1DBGWVR5_EL1DBGWCR5_EL1DBGWVR6_EL1DBGWCR6_EL1DBGWVR7_EL1DBGWCR7_EL1DBGWVR8_EL1DBGWCR8_EL1DBGWVR9_EL1DBGWCR9_EL1DBGWVR10_EL1DBGWCR10_EL1DBGWVR11_EL1DBGWCR11_EL1DBGWVR12_EL1DBGWCR12_EL1DBGWVR13_EL1DBGWCR13_EL1DBGWVR14_EL1DBGWCR14_EL1DBGWVR15_EL1DBGWCR15_EL1DBGBVR0_EL1DBGBCR0_EL1DBGBVR1_EL1DBGBCR1_EL1DBGBVR2_EL1DBGBCR2_EL1DBGBVR3_EL1DBGBCR3_EL1DBGBVR4_EL1DBGBCR4_EL1DBGBVR5_EL1DBGBCR5_EL1DBGBVR6_EL1DBGBCR6_EL1DBGBVR7_EL1DBGBCR7_EL1DBGBVR8_EL1DBGBCR8_EL1DBGBVR9_EL1DBGBCR9_EL1DBGBVR10_EL1DBGBCR10_EL1DBGBVR11_EL1DBGBCR11_EL1DBGBVR12_EL1DBGBCR12_EL1DBGBVR13_EL1DBGBCR13_EL1DBGBVR14_EL1DBGBCR14_EL1DBGBVR15_EL1DBGBCR15_EL1syscalltlsfpsrfpcr @ @ aarch64_retval.ccount >= 1 && count <= 4count > 0size == 2 || size == 4 || size == 8 || size == 16tag == DW_TAG_structure_type || tag == DW_TAG_class_type || tag == DW_TAG_union_type || tag == DW_TAG_array_type++[*`+ +[*[*[*[*PQ@ABC@ABC@ABC@ABCpass_hfaphfa_typeaarch64_return_value_location HIJKLMNOsparc_reloc_valid_use#.<KZjz ,=JXhx.>N_is}-@Ti~!4G\q2K^jyR_SPARC_NONER_SPARC_8R_SPARC_16R_SPARC_32R_SPARC_DISP8R_SPARC_DISP16R_SPARC_DISP32R_SPARC_WDISP30R_SPARC_WDISP22R_SPARC_HI22R_SPARC_22R_SPARC_13R_SPARC_LO10R_SPARC_GOT10R_SPARC_GOT13R_SPARC_GOT22R_SPARC_PC10R_SPARC_PC22R_SPARC_WPLT30R_SPARC_COPYR_SPARC_GLOB_DATR_SPARC_JMP_SLOTR_SPARC_RELATIVER_SPARC_UA32R_SPARC_PLT32R_SPARC_HIPLT22R_SPARC_LOPLT10R_SPARC_PCPLT32R_SPARC_PCPLT22R_SPARC_PCPLT10R_SPARC_10R_SPARC_11R_SPARC_64R_SPARC_OLO10R_SPARC_HH22R_SPARC_HM10R_SPARC_LM22R_SPARC_PC_HH22R_SPARC_PC_HM10R_SPARC_PC_LM22R_SPARC_WDISP16R_SPARC_WDISP19R_SPARC_GLOB_JMPR_SPARC_7R_SPARC_5R_SPARC_6R_SPARC_DISP64R_SPARC_PLT64R_SPARC_HIX22R_SPARC_LOX10R_SPARC_H44R_SPARC_M44R_SPARC_L44R_SPARC_REGISTERR_SPARC_UA64R_SPARC_UA16R_SPARC_TLS_GD_HI22R_SPARC_TLS_GD_LO10R_SPARC_TLS_GD_ADDR_SPARC_TLS_GD_CALLR_SPARC_TLS_LDM_HI22R_SPARC_TLS_LDM_LO10R_SPARC_TLS_LDM_ADDR_SPARC_TLS_LDM_CALLR_SPARC_TLS_LDO_HIX22R_SPARC_TLS_LDO_LOX10R_SPARC_TLS_LDO_ADDR_SPARC_TLS_IE_HI22R_SPARC_TLS_IE_LO10R_SPARC_TLS_IE_LDR_SPARC_TLS_IE_LDXR_SPARC_TLS_IE_ADDR_SPARC_TLS_LE_HIX22R_SPARC_TLS_LE_LOX10R_SPARC_TLS_DTPMOD32R_SPARC_TLS_DTPMOD64R_SPARC_TLS_DTPOFF32R_SPARC_TLS_DTPOFF64R_SPARC_TLS_TPOFF32R_SPARC_TLS_TPOFF64R_SPARC_GOTDATA_HIX22R_SPARC_GOTDATA_LOX10R_SPARC_GOTDATA_OP_HIX22R_SPARC_GOTDATA_OP_LOX10R_SPARC_GOTDATA_OPR_SPARC_H34R_SPARC_SIZE32R_SPARC_SIZE64R_SPARC_WDISP10R_SPARC_JMP_IRELR_SPARC_IRELATIVER_SPARC_GNU_VTINHERITR_SPARC_GNU_VTENTRYR_SPARC_REV32SPARC_REGISTER    goliypsrwimtbrpcnpcfsrcsrpcnpcstatefsrfprsy!pp! !!!!!!!!!! !!p!!!p!!!!!!! ! !! !!!!!!!!!!!!!!!!!!!!!!!!!!!!! x !"#XY F  A D @ B  @ S@T@@ R@P@U@bflushstbarswapmuldivv9ultra3v9vGNU_Sparc_HWCAPSGNU_Sparc_HWCAPS2gnu,fjathplusvis3badpsparc5mwaitxmpmulxmontnsecresv8resv9resv10resv11fjathhpcfjdesfjaesresv15resv16resv17resv18resv19resv20resv21resv22resv23resv24resv25resv26resv27resv28resv29resv30resv31mul32div32fsmuldpopcvisvis2asi_blk_initfmafvis3randomtransfjfmauimaasi_cache_sparingkasumicamelliamd5sha1sha256sha512pausecbcondcrc32c      !"#$%&'()*+,-./0123456789:;<=4?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefppc_reloc_valid_use &3CScp$/>M\lz ,6ESdu$9K`u0BTi~"5GXl R_PPC_NONER_PPC_ADDR32R_PPC_ADDR24R_PPC_ADDR16R_PPC_ADDR16_LOR_PPC_ADDR16_HIR_PPC_ADDR16_HAR_PPC_ADDR14R_PPC_ADDR14_BRTAKENR_PPC_ADDR14_BRNTAKENR_PPC_REL24R_PPC_REL14R_PPC_REL14_BRTAKENR_PPC_REL14_BRNTAKENR_PPC_GOT16R_PPC_GOT16_LOR_PPC_GOT16_HIR_PPC_GOT16_HAR_PPC_PLTREL24R_PPC_COPYR_PPC_GLOB_DATR_PPC_JMP_SLOTR_PPC_RELATIVER_PPC_LOCAL24PCR_PPC_UADDR32R_PPC_UADDR16R_PPC_REL32R_PPC_PLT32R_PPC_PLTREL32R_PPC_PLT16_LOR_PPC_PLT16_HIR_PPC_PLT16_HAR_PPC_SDAREL16R_PPC_SECTOFFR_PPC_SECTOFF_LOR_PPC_SECTOFF_HIR_PPC_SECTOFF_HAR_PPC_TLSR_PPC_DTPMOD32R_PPC_TPREL16R_PPC_TPREL16_LOR_PPC_TPREL16_HIR_PPC_TPREL16_HAR_PPC_TPREL32R_PPC_DTPREL16R_PPC_DTPREL16_LOR_PPC_DTPREL16_HIR_PPC_DTPREL16_HAR_PPC_DTPREL32R_PPC_GOT_TLSGD16R_PPC_GOT_TLSGD16_LOR_PPC_GOT_TLSGD16_HIR_PPC_GOT_TLSGD16_HAR_PPC_GOT_TLSLD16R_PPC_GOT_TLSLD16_LOR_PPC_GOT_TLSLD16_HIR_PPC_GOT_TLSLD16_HAR_PPC_GOT_TPREL16R_PPC_GOT_TPREL16_LOR_PPC_GOT_TPREL16_HIR_PPC_GOT_TPREL16_HAR_PPC_GOT_DTPREL16R_PPC_GOT_DTPREL16_LOR_PPC_GOT_DTPREL16_HIR_PPC_GOT_DTPREL16_HAR_PPC_EMB_NADDR32R_PPC_EMB_NADDR16R_PPC_EMB_NADDR16_LOR_PPC_EMB_NADDR16_HIR_PPC_EMB_NADDR16_HAR_PPC_EMB_SDAI16R_PPC_EMB_SDA2I16R_PPC_EMB_SDA2RELR_PPC_EMB_SDA21R_PPC_EMB_MRKREFR_PPC_EMB_RELSEC16R_PPC_EMB_RELST_LOR_PPC_EMB_RELST_HIR_PPC_EMB_RELST_HAR_PPC_EMB_BIT_FLDR_PPC_EMB_RELSDAR_PPC_DIAB_SDA21_LOR_PPC_DIAB_SDA21_HIR_PPC_DIAB_SDA21_HAR_PPC_DIAB_RELSDA_LOR_PPC_DIAB_RELSDA_HIR_PPC_DIAB_RELSDA_HAR_PPC_REL16R_PPC_REL16_LOR_PPC_REL16_HIR_PPC_REL16_HAR_PPC_TOC16PPC_GOTPPC_OPT_SDA_BASE_.sdata.data_SDA2_BASE_.sdata2(XXXsf!STUVvectorprivilegedniporig_gpr3 r@t@s@d d C d  @ A  B m l e @ d w v bppcletruele3456789power6xdfppa6tarch_2_05ic_snoopsmtbookecellbepower5+power5power4notbefpdoubleefpsinglespeucache4xxmacmmufpualtivecppc601ppc64ppc32GNU_Power_ABI_FPGNU_Power_ABI_VectorGNU_Power_ABI_Struct_ReturnAnyr3/r4MemoryGenericAltiVecSPEHard or soft floatHard floatSoft floatSingle-precision hard floatA .opdppc64_reloc_valid_use,;M_q(9FWhy /BQ`v):FWk-AUlx/@Tk #:Qi $=Qh !6LbyR_PPC64_NONER_PPC64_ADDR32R_PPC64_ADDR24R_PPC64_ADDR16R_PPC64_ADDR16_LOR_PPC64_ADDR16_HIR_PPC64_ADDR16_HAR_PPC64_ADDR14R_PPC64_ADDR14_BRTAKENR_PPC64_ADDR14_BRNTAKENR_PPC64_REL24R_PPC64_REL14R_PPC64_REL14_BRTAKENR_PPC64_REL14_BRNTAKENR_PPC64_GOT16R_PPC64_GOT16_LOR_PPC64_GOT16_HIR_PPC64_GOT16_HAR_PPC64_COPYR_PPC64_GLOB_DATR_PPC64_JMP_SLOTR_PPC64_RELATIVER_PPC64_UADDR32R_PPC64_UADDR16R_PPC64_REL32R_PPC64_PLT32R_PPC64_PLTREL32R_PPC64_PLT16_LOR_PPC64_PLT16_HIR_PPC64_PLT16_HAR_PPC64_SECTOFFR_PPC64_SECTOFF_LOR_PPC64_SECTOFF_HIR_PPC64_SECTOFF_HAR_PPC64_ADDR30R_PPC64_ADDR64R_PPC64_ADDR16_HIGHERR_PPC64_ADDR16_HIGHERAR_PPC64_ADDR16_HIGHESTR_PPC64_ADDR16_HIGHESTAR_PPC64_UADDR64R_PPC64_REL64R_PPC64_PLT64R_PPC64_PLTREL64R_PPC64_TOC16R_PPC64_TOC16_LOR_PPC64_TOC16_HIR_PPC64_TOC16_HAR_PPC64_TOCR_PPC64_PLTGOT16R_PPC64_PLTGOT16_LOR_PPC64_PLTGOT16_HIR_PPC64_PLTGOT16_HAR_PPC64_ADDR16_DSR_PPC64_ADDR16_LO_DSR_PPC64_GOT16_DSR_PPC64_GOT16_LO_DSR_PPC64_PLT16_LO_DSR_PPC64_SECTOFF_DSR_PPC64_SECTOFF_LO_DSR_PPC64_TOC16_DSR_PPC64_TOC16_LO_DSR_PPC64_PLTGOT16_DSR_PPC64_PLTGOT16_LO_DSR_PPC64_TLSR_PPC64_DTPMOD64R_PPC64_TPREL16R_PPC64_TPREL16_LOR_PPC64_TPREL16_HIR_PPC64_TPREL16_HAR_PPC64_TPREL64R_PPC64_DTPREL16R_PPC64_DTPREL16_LOR_PPC64_DTPREL16_HIR_PPC64_DTPREL16_HAR_PPC64_DTPREL64R_PPC64_GOT_TLSGD16R_PPC64_GOT_TLSGD16_LOR_PPC64_GOT_TLSGD16_HIR_PPC64_GOT_TLSGD16_HAR_PPC64_GOT_TLSLD16R_PPC64_GOT_TLSLD16_LOR_PPC64_GOT_TLSLD16_HIR_PPC64_GOT_TLSLD16_HAR_PPC64_GOT_TPREL16_DSR_PPC64_GOT_TPREL16_LO_DSR_PPC64_GOT_TPREL16_HIR_PPC64_GOT_TPREL16_HAR_PPC64_GOT_DTPREL16_DSR_PPC64_GOT_DTPREL16_LO_DSR_PPC64_GOT_DTPREL16_HIR_PPC64_GOT_DTPREL16_HAR_PPC64_TPREL16_DSR_PPC64_TPREL16_LO_DSR_PPC64_TPREL16_HIGHERR_PPC64_TPREL16_HIGHERAR_PPC64_TPREL16_HIGHESTR_PPC64_TPREL16_HIGHESTAR_PPC64_DTPREL16_DSR_PPC64_DTPREL16_LO_DSR_PPC64_DTPREL16_HIGHERR_PPC64_DTPREL16_HIGHERAR_PPC64_DTPREL16_HIGHESTR_PPC64_DTPREL16_HIGHESTAR_PPC64_TLSGDR_PPC64_TLSLDR_PPC64_TOCSAVER_PPC64_ADDR16_HIGHR_PPC64_ADDR16_HIGHAR_PPC64_TPREL16_HIGHR_PPC64_TPREL16_HIGHAR_PPC64_DTPREL16_HIGHR_PPC64_DTPREL16_HIGHAR_PPC64_JMP_IRELR_PPC64_IRELATIVER_PPC64_REL16R_PPC64_REL16_LOR_PPC64_REL16_HIR_PPC64_REL16_HAPPC64_GLINKPPC64_OPDPPC64_OPDSZPPC64_OPT`nnnnnnsf!"#$S r@t@s@d d C d  @ A @ B@m@ l@(e@0@@8d@Hw@Pv@s390_reloc_valid_use &/:FR^ix%1=JYhw!0BTfv$-9HR_390_NONER_390_8R_390_12R_390_16R_390_32R_390_PC32R_390_GOT12R_390_GOT32R_390_PLT32R_390_COPYR_390_GLOB_DATR_390_JMP_SLOTR_390_RELATIVER_390_GOTOFF32R_390_GOTPCR_390_GOT16R_390_PC16R_390_PC16DBLR_390_PLT16DBLR_390_PC32DBLR_390_PLT32DBLR_390_GOTPCDBLR_390_64R_390_PC64R_390_GOT64R_390_PLT64R_390_GOTENTR_390_GOTOFF16R_390_GOTOFF64R_390_GOTPLT12R_390_GOTPLT16R_390_GOTPLT32R_390_GOTPLT64R_390_GOTPLTENTR_390_PLTOFF16R_390_PLTOFF32R_390_PLTOFF64R_390_TLS_LOADR_390_TLS_GDCALLR_390_TLS_LDCALLR_390_TLS_GD32R_390_TLS_GD64R_390_TLS_GOTIE12R_390_TLS_GOTIE32R_390_TLS_GOTIE64R_390_TLS_LDM32R_390_TLS_LDM64R_390_TLS_IE32R_390_TLS_IE64R_390_TLS_IEENTR_390_TLS_LE32R_390_TLS_LE64R_390_TLS_LDO32R_390_TLS_LDO64R_390_TLS_DTPMODR_390_TLS_DTPOFFR_390_TLS_TPOFFR_390_20R_390_GOT20R_390_GOTPLT20R_390_TLS_GOTIE20 ``````````000000``````````000000hhhh0r`RSorig_r2system_calllast_breakhigh_r0high_r1high_r2high_r3high_r4high_r5high_r6high_r7high_r8high_r9high_r10high_r11high_r12high_r13high_r14high_r15fpc @ @@@!@)@1@9@A@I@Q@Y@a@i@q@y@@ A  H0  @ @@@!@)@1@9@A@I@Q@Y@a@i@q@y@@@A@@0      s390_initreg.cebl->class == ELFCLASS32s390_normalize_pcm68k_reloc_valid_use &1<FR^iv.<L\k{R_68K_NONER_68K_32R_68K_16R_68K_8R_68K_PC32R_68K_PC16R_68K_PC8R_68K_GOT32R_68K_GOT16R_68K_GOT8R_68K_GOT32OR_68K_GOT16OR_68K_GOT8OR_68K_PLT32R_68K_PLT16R_68K_PLT8R_68K_PLT32OR_68K_PLT16OR_68K_PLT8OR_68K_COPYR_68K_GLOB_DATR_68K_JMP_SLOTR_68K_RELATIVER_68K_TLS_GD32R_68K_TLS_GD16R_68K_TLS_GD8R_68K_TLS_LDM32R_68K_TLS_LDM16R_68K_TLS_LDM8R_68K_TLS_LDO32R_68K_TLS_LDO16R_68K_TLS_LDO8R_68K_TLS_IE32R_68K_TLS_IE16R_68K_TLS_IE8R_68K_TLS_LE32R_68K_TLS_LE16R_68K_TLS_LE8R_68K_TLS_DTPMOD32R_68K_TLS_DTPREL32R_68K_TLS_TPREL32 dddddddd8ee8888888888888e888e888888888888888888888888888888888888888X`XPQ ` 8 < H     bpf_reloc_valid_use R_BPF_NONER_BPF_64_64R_BPF_64_32r%driscv_reloc_valid_use$5BTi~ /CVk#1>LZh~"/<IWevR_RISCV_NONER_RISCV_32R_RISCV_64R_RISCV_RELATIVER_RISCV_COPYR_RISCV_JUMP_SLOTR_RISCV_TLS_DTPMOD32R_RISCV_TLS_DTPMOD64R_RISCV_TLS_DTPREL32R_RISCV_TLS_DTPREL64R_RISCV_TLS_TPREL32R_RISCV_TLS_TPREL64R_RISCV_BRANCHR_RISCV_JALR_RISCV_CALLR_RISCV_CALL_PLTR_RISCV_GOT_HI20R_RISCV_TLS_GOT_HI20R_RISCV_TLS_GD_HI20R_RISCV_PCREL_HI20R_RISCV_PCREL_LO12_IR_RISCV_PCREL_LO12_SR_RISCV_HI20R_RISCV_LO12_IR_RISCV_LO12_SR_RISCV_TPREL_HI20R_RISCV_TPREL_LO12_IR_RISCV_TPREL_LO12_SR_RISCV_TPREL_ADDR_RISCV_ADD8R_RISCV_ADD16R_RISCV_ADD32R_RISCV_ADD64R_RISCV_SUB8R_RISCV_SUB16R_RISCV_SUB32R_RISCV_SUB64R_RISCV_GNU_VTINHERITR_RISCV_GNU_VTENTRYR_RISCV_ALIGNR_RISCV_RVC_BRANCHR_RISCV_RVC_JUMPR_RISCV_RVC_LUIR_RISCV_GPREL_IR_RISCV_GPREL_SR_RISCV_TPREL_IR_RISCV_TPREL_SR_RISCV_RELAXR_RISCV_SUB6R_RISCV_SET6R_RISCV_SET8R_RISCV_SET16R_RISCV_SET32R_RISCV_32_PCRELR_RISCV_IRELATIVER_RISCV_PLT32R_RISCV_SET_ULEB128R_RISCV_SUB_ULEB128__global_pointer$RISCV_ATTRIBUTESRISCV_VARIANT_CC  ()23456789:;x((HHHHHHHHhhhhhhhh((((((((HH88XX   @###<#"####Z[z*+*+csky_reloc_valid_use5L]x 4Ld| -?N`r*A[u*@R_CKCORE_NONER_CKCORE_ADDR32R_CKCORE_PCRELIMM8BY4R_CKCORE_PCRELIMM11BY2R_CKCORE_PCREL32R_CKCORE_PCRELJSR_IMM11BY2R_CKCORE_RELATIVER_CKCORE_COPYR_CKCORE_GLOB_DATR_CKCORE_JUMP_SLOTR_CKCORE_GOTOFFR_CKCORE_GOTPCR_CKCORE_GOT32R_CKCORE_PLT32R_CKCORE_ADDRGOTR_CKCORE_ADDRPLTR_CKCORE_PCREL_IMM26BY2R_CKCORE_PCREL_IMM16BY2R_CKCORE_PCREL_IMM16BY4R_CKCORE_PCREL_IMM10BY2R_CKCORE_PCREL_IMM10BY4R_CKCORE_ADDR_HI16R_CKCORE_ADDR_LO16R_CKCORE_GOTPC_HI16R_CKCORE_GOTPC_LO16R_CKCORE_GOTOFF_HI16R_CKCORE_GOTOFF_LO16R_CKCORE_GOT12R_CKCORE_GOT_HI16R_CKCORE_GOT_LO16R_CKCORE_PLT12R_CKCORE_PLT_HI16R_CKCORE_PLT_LO16R_CKCORE_ADDRGOT_HI16R_CKCORE_ADDRGOT_LO16R_CKCORE_ADDRPLT_HI16R_CKCORE_ADDRPLT_LO16R_CKCORE_PCREL_JSR_IMM26BY2R_CKCORE_TOFFSET_LO16R_CKCORE_DOFFSET_LO16R_CKCORE_PCREL_IMM18BY2R_CKCORE_DOFFSET_IMM18R_CKCORE_DOFFSET_IMM18BY2R_CKCORE_DOFFSET_IMM18BY4R_CKCORE_GOT_IMM18BY4R_CKCORE_PLT_IMM18BY4R_CKCORE_PCREL_IMM7BY4R_CKCORE_TLS_LE32R_CKCORE_TLS_IE32R_CKCORE_TLS_GD32R_CKCORE_TLS_LDM32R_CKCORE_TLS_LDO32R_CKCORE_TLS_DTPMOD32R_CKCORE_TLS_DTPOFF32R_CKCORE_TLS_TPOFF32CSKY_ATTRIBUTES    Tt $loongarch_reloc_valid_use$5BTi~6Kb} *:Nh6KXft #4EXk~ 1DWk 3I_v*>RR_LARCH_NONER_LARCH_32R_LARCH_64R_LARCH_RELATIVER_LARCH_COPYR_LARCH_JUMP_SLOTR_LARCH_TLS_DTPMOD32R_LARCH_TLS_DTPMOD64R_LARCH_TLS_DTPREL32R_LARCH_TLS_DTPREL64R_LARCH_TLS_TPREL32R_LARCH_TLS_TPREL64R_LARCH_IRELATIVER_LARCH_MARK_LAR_LARCH_MARK_PCRELR_LARCH_SOP_PUSH_PCRELR_LARCH_SOP_PUSH_ABSOLUTER_LARCH_SOP_PUSH_DUPR_LARCH_SOP_PUSH_GPRELR_LARCH_SOP_PUSH_TLS_TPRELR_LARCH_SOP_PUSH_TLS_GOTR_LARCH_SOP_PUSH_TLS_GDR_LARCH_SOP_PUSH_PLT_PCRELR_LARCH_SOP_ASSERTR_LARCH_SOP_NOTR_LARCH_SOP_SUBR_LARCH_SOP_SLR_LARCH_SOP_SRR_LARCH_SOP_ADDR_LARCH_SOP_ANDR_LARCH_SOP_IF_ELSER_LARCH_SOP_POP_32_S_10_5R_LARCH_SOP_POP_32_U_10_12R_LARCH_SOP_POP_32_S_10_12R_LARCH_SOP_POP_32_S_10_16R_LARCH_SOP_POP_32_S_10_16_S2R_LARCH_SOP_POP_32_S_5_20R_LARCH_SOP_POP_32_S_0_5_10_16_S2R_LARCH_SOP_POP_32_S_0_10_10_16_S2R_LARCH_SOP_POP_32_UR_LARCH_ADD8R_LARCH_ADD16R_LARCH_ADD24R_LARCH_ADD32R_LARCH_ADD64R_LARCH_SUB8R_LARCH_SUB16R_LARCH_SUB24R_LARCH_SUB32R_LARCH_SUB64R_LARCH_GNU_VTINHERITR_LARCH_GNU_VTENTRYR_LARCH_B16R_LARCH_B21R_LARCH_B26R_LARCH_ABS_HI20R_LARCH_ABS_LO12R_LARCH_ABS64_LO20R_LARCH_ABS64_HI12R_LARCH_PCALA_HI20R_LARCH_PCALA_LO12R_LARCH_PCALA64_LO20R_LARCH_PCALA64_HI12R_LARCH_GOT_PC_HI20R_LARCH_GOT_PC_LO12R_LARCH_GOT64_PC_LO20R_LARCH_GOT64_PC_HI12R_LARCH_GOT_HI20R_LARCH_GOT_LO12R_LARCH_GOT64_LO20R_LARCH_GOT64_HI12R_LARCH_TLS_LE_HI20R_LARCH_TLS_LE_LO12R_LARCH_TLS_LE64_LO20R_LARCH_TLS_LE64_HI12R_LARCH_TLS_IE_PC_HI20R_LARCH_TLS_IE_PC_LO12R_LARCH_TLS_IE64_PC_LO20R_LARCH_TLS_IE64_PC_HI12R_LARCH_TLS_IE_HI20R_LARCH_TLS_IE_LO12R_LARCH_TLS_IE64_LO20R_LARCH_TLS_IE64_HI12R_LARCH_TLS_LD_PC_HI20R_LARCH_TLS_LD_HI20R_LARCH_TLS_GD_PC_HI20R_LARCH_TLS_GD_HI20R_LARCH_32_PCRELR_LARCH_RELAXR_LARCH_DELETER_LARCH_ALIGNR_LARCH_PCREL20_S2R_LARCH_CFAR_LARCH_ADD6R_LARCH_SUB6R_LARCH_ADD_ULEB128R_LARCH_SUB_ULEB128R_LARCH_64_PCREL\Rl|L 89:;<=>?L, t\\\\\\\\\<<<<<<<<ddddddddOOTUt !orig_a0csr_eracsr_badvaddrcsr_crmdcsr_prmdcsr_euencsr_ecfgcsr_estat @ arc_reloc_valid_use &/8BLV`n ,4@M^mx&;Pbs !6R_ARC_NONER_ARC_8R_ARC_16R_ARC_24R_ARC_32R_ARC_N8R_ARC_N16R_ARC_N24R_ARC_N32R_ARC_SDAR_ARC_SECTOFFR_ARC_S21H_PCRELR_ARC_S21W_PCRELR_ARC_S25H_PCRELR_ARC_S25W_PCRELR_ARC_SDA32R_ARC_SDA_LDSTR_ARC_SDA_LDST1R_ARC_SDA_LDST2R_ARC_SDA16_LDR_ARC_SDA16_LD1R_ARC_SDA16_LD2R_ARC_S13_PCRELR_ARC_WR_ARC_32_MER_ARC_N32_MER_ARC_SECTOFF_MER_ARC_SDA32_MER_ARC_W_MER_ARC_SDA_12R_ARC_SDA16_ST2R_ARC_32_PCRELR_ARC_PC32R_ARC_GOTPC32R_ARC_PLT32R_ARC_COPYR_ARC_GLOB_DATR_ARC_JMP_SLOTR_ARC_RELATIVER_ARC_GOTOFFR_ARC_GOTPCR_ARC_GOT32R_ARC_S21W_PCREL_PLTR_ARC_S25H_PCREL_PLTR_ARC_JLI_SECTOFFR_ARC_TLS_DTPMODR_ARC_TLS_DTPOFFR_ARC_TLS_TPOFFR_ARC_TLS_GD_GOTR_ARC_TLS_GD_LDR_ARC_TLS_GD_CALLR_ARC_TLS_IE_GOTR_ARC_TLS_DTPOFF_S9R_ARC_TLS_LE_S9R_ARC_TLS_LE_32R_ARC_S25W_PCREL_PLTR_ARC_S21H_PCREL_PLTR_ARC_NPS_CMEM16ARC_ATTRIBUTES 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E adcaddaddpdaddpsaddsdaddssaddsubpdaddsubpsandandnpdandnpsandpdandpsblendpdblendpsblendvpdblendvpsbsfbsrbswapbtbtcbtrbtscallclccldclflushclicltscmccmovcmpcmpeqpscmpeqsscmplepscmplesscmpltpscmpltsscmpneqpscmpneqsscmpnlepscmpnlesscmpnltpscmpnltsscmpordpscmpordsscmpscmpunordpscmpunordsscmpxchgcomisdcomisscpuidcvtdq2pdcvtdq2pscvtpd2dqcvtpd2picvtpd2pscvtpi2pdcvtpi2pscvtps2dqcvtps2pdcvtps2picvtsd2sicvtsd2sscvtsi2sdcvtsi2sscvtss2sdcvtss2sicvttpd2dqcvttpd2picvttps2dqcvttps2picvttsd2sicvttss2sidecdivdivpddivpsdivsddivssdppddppsemmsenterf2xm1fabsfaddfaddpfbldfbstpfchsfclexfcmovbfcmovbefcmovefcmovnbfcmovnbefcmovnefcmovnufcmovufcomfcomifcomipfcompfcomppfcosfdecstpfdivfdivpfdivrfdivrpffreefiaddficomficompfidivfidivlfidivrfidivrlfildfildlfildllfimulfincstpfinitfistfistpfistpllfisttpfisttpllfisubfisubrfldfld1fldcwfldenvfldl2efldl2tfldlg2fldln2fldpifldtfldzfmulfmulpfnclexfninitfnopfnsavefnstcwfnstenvfnstswfpatanfpremfprem1fptanfrndintfrstorfscalefsinfsincosfsqrtfstfstpfstptfsubfsubpfsubrfsubrpftstfucomfucomifucomipfucompfwaitfxamfxchfxrstorfxsavefxtractfyl2xfyl2xp1getsechaddpdhaddpshlthsubpdhsubpsidivimulinincinsinsertpsintint3invdinvlpgiretjjmplahflarlcalllddquldmxcsrlealeavelfencelfslgdtlgslidtljmplldtlmswlocklodslooploopeloopnelretlsllssltrmaskmovdqumaskmovqmaxpdmaxpsmaxsdmaxssmfenceminpdminpsminsdminssmonitormovmovapdmovapsmovdmovddupmovdq2qmovdqamovdqumovhlpdmovhlpsmovhpdmovhpsmovlhpdmovlhpsmovlpdmovlpsmovmskpdmovmskpsmovntdqmovntdqamovntimovntpdmovntpsmovntqmovqmovq2dqmovsmovsblmovsdmovshdupmovsldupmovslqmovssmovswlmovupdmovupsmovzblmovzwlmpsadbwmulmulpdmulpsmulsdmulssmwaitnegnopnotororpdorpsoutoutspabsbpabsdpabswpackssdwpacksswbpackusdwpackuswbpaddbpadddpaddqpaddsbpaddswpaddusbpadduswpaddwpalignrpandpandnpausepavgbpavgwpblendvbpblendwpcmpeqbpcmpeqdpcmpeqqpcmpeqwpcmpestripcmpestrmpcmpgtbpcmpgtdpcmpgtqpcmpgtwpcmpistripcmpistrmpextrwphadddphaddswphaddwphminposuwphsubdphsubswphsubwpinsrbpinsrdpinsrwpmaddubswpmaddwdpmaxsbpmaxsdpmaxswpmaxubpmaxudpmaxuwpminsbpminsdpminswpminubpminudpminuwpmovmskbpmovsxbdpmovsxbqpmovsxbwpmovsxdqpmovsxwdpmovsxwqpmovzxbdpmovzxbqpmovzxbwpmovzxdqpmovzxwdpmovzxwqpmuldqpmulhrswpmulhuwpmulhwpmulldpmullwpmuludqpoppopcntpopfporprefetchprefetchntaprefetcht0prefetcht1prefetcht2prefetchwpsadbwpshufbpshufdpshufhwpshuflwpshufwpsignbpsigndpsignwpslldpslldqpsllqpsllwpsradpsrawpsrldpsrldqpsrlqpsrlwpsubbpsubdpsubqpsubsbpsubswpsubusbpsubuswpsubwptestpunpckhbwpunpckhdqpunpckhqdqpunpckhwdpunpcklbwpunpckldqpunpcklqdqpunpcklwdpushpushfpushqpxorrclrcppsrcpssrcrrdmsrrdpmcrdtscretrolrorroundpdroundpsroundsdroundssrsmrsqrtpsrsqrtsssahfsarsbbscassetsfencesgdtshlshldshrshrdshufpdshufpssidtsldtsmswsqrtpdsqrtpssqrtsdsqrtssstcstdstistmxcsrstosstrsubsubpdsubpssubsdsubssswapgssyscallsysentersysexitsysrettestucomisducomissud2aunpckhpdunpckhpsunpcklpdunpcklpsverrverwvmcallvmclearvmlaunchvmptrldvmptrstvmreadvmresumevmwritevmxoffvmxonwbinvdwrmsrxaddxchgxlatxorxorpdxorpsr%1$d = %2$#lxr%1$d = map_fd(%2$#lx)call %1$dr0 = *(u8 *)skb[%1$d]r0 = *(u16 *)skb[%1$d]r0 = *(u32 *)skb[%1$d]r%1$d = le%2$d(r%1$d)r%1$d = be%2$d(r%1$d)r%1$d = (u32)r%1$d + %2$dr%1$d = (u32)r%1$d - %2$dr%1$d = (u32)r%1$d * %2$dr%1$d = (u32)r%1$d / %2$dr%1$d = (u32)r%1$d | %2$#xr%1$d = (u32)r%1$d & %2$#xr%1$d = (u32)r%1$d << %2$dr%1$d = (u32)r%1$d >> %2$dr%1$d = (u32)r%1$d %% %2$dr%1$d = (u32)r%1$d ^ %2$#xr%1$d = %2$#xr%1$d += %2$dr%1$d -= %2$dr%1$d *= %2$dr%1$d /= %2$dr%1$d |= %2$dr%1$d &= %2$dr%1$d <<= %2$dr%1$d >>= %2$dr%1$d %%= %2$dr%1$d ^= %2$dr%1$d = %2$dr%1$d = (s64)r%1$d >> %2$dr0 = *(u8 *)skb[r%1$d+%2$d]r0 = *(u16 *)skb[r%1$d+%2$d]r0 = *(u32 *)skb[r%1$d+%2$d]r%1$d = (u32)r%2$dr%1$d += r%2$dr%1$d -= r%2$dr%1$d *= r%2$dr%1$d /= r%2$dr%1$d |= r%2$dr%1$d &= r%2$dr%1$d <<= r%2$dr%1$d >>= r%2$dr%1$d %%= r%2$dr%1$d ^= r%2$dr%1$d = r%2$dr%1$d = (s64)r%1$d >> r%2$dr%1$d = (u32)-r%1$dr%1$d = -r%1$dif r%1$d == %2$d goto %3$#xif r%1$d > %2$d goto %3$#xif r%1$d >= %2$d goto %3$#xif r%1$d & %2$d goto %3$#xif r%1$d != %2$d goto %3$#xif r%1$d < %2$d goto %3$#xif r%1$d <= %2$d goto %3$#xif r%1$d == r%2$d goto %3$#xif r%1$d > r%2$d goto %3$#xif r%1$d >= r%2$d goto %3$#xif r%1$d & r%2$d goto %3$#xif r%1$d != r%2$d goto %3$#xif r%1$d < r%2$d goto %3$#xif r%1$d <= r%2$d goto %3$#x*(u8 *)(r%1$d%3$+d) = %2$d*(u16 *)(r%1$d%3$+d) = %2$d*(u32 *)(r%1$d%3$+d) = %2$d*(u64 *)(r%1$d%3$+d) = %2$dr%1$d = *(u8 *)(r%2$d%3$+d)r%1$d = *(u16 *)(r%2$d%3$+d)r%1$d = *(u32 *)(r%2$d%3$+d)r%1$d = *(u64 *)(r%2$d%3$+d)*(u8 *)(r%1$d%3$+d) = r%2$d*(u16 *)(r%1$d%3$+d) = r%2$d*(u32 *)(r%1$d%3$+d) = r%2$d*(u64 *)(r%1$d%3$+d) = r%2$dgoto %1$#xinvalid class %sr%1$d = ld_pseudo(%3$d, %2$#lx)r%1$d = (u32)((s32)r%1$d >> %2$d)r%1$d = (u32)r%1$d + (u32)r%2$dr%1$d = (u32)r%1$d - (u32)r%2$dr%1$d = (u32)r%1$d * (u32)r%2$dr%1$d = (u32)r%1$d / (u32)r%2$dr%1$d = (u32)r%1$d | (u32)r%2$dr%1$d = (u32)r%1$d & (u32)r%2$dr%1$d = (u32)r%1$d << (u32)r%2$dr%1$d = (u32)r%1$d >> (u32)r%2$dr%1$d = (u32)r%1$d %% (u32)r%2$dr%1$d = (u32)r%1$d ^ (u32)r%2$dr%1$d = (u32)((s32)r%1$d >> r%2$d)if (s64)r%1$d > %2$d goto %3$#xif (s64)r%1$d >= %2$d goto %3$#xif (s64)r%1$d < %2$d goto %3$#xif (s64)r%1$d <= %2$d goto %3$#xif (s64)r%1$d > (s64)r%2$d goto %3$#xif (s64)r%1$d >= (s64)r%2$d goto %3$#xif (s64)r%1$d < (s64)r%2$d goto %3$#xif (s64)r%1$d <= (s64)r%2$d goto %3$#xlock *(u32 *)(r%1$d%3$+d) += r%2$dlock *(u64 *)(r%1$d%3$+d) += r%2$dC+7Q] TCn^jv`lx".:FRiu)5AMYeq} #/;GS_kwldldxststxalujmp6alu64c.addisext.waddiwc.liflwsraisrliandic.mvc.addbeqzbnezfswsext.auipcluinegnegwzerofmin.fmax.csrrcsrccsrwfencesgtzblejrmretcsrsbleusltzsnezblezfence.tsojaljalrbgtzfence.icsrsisreturetebreakecallwfic.nopunimpfsdfldc.sllinotseqzriscv_disasm.c%lu%lu(%s)%ld(%s)%u(%s)%ld0x%04xcp[-1] != ' '%u0x%08x wd csrrwcsrrscsrrccsrrwicsrrsicsrrciustatusfflagsframfcsruieutvecuscratchuepcucauseutvaluipsedelegsidelegscounterenvsstatusvsievstvecvsscratchvsepcvscausevstvalvsipvsatphstatushedeleghideleghtimedeltahcounterenhtimedeltahhgatphpmcounter3hpmcounter4hpmcounter5hpmcounter6hpmcounter7hpmcounter8hpmcounter9hpmcounter10hpmcounter11hpmcounter12hpmcounter13hpmcounter14hpmcounter15hpmcounter16hpmcounter17hpmcounter18hpmcounter19hpmcounter20hpmcounter21hpmcounter22hpmcounter23hpmcounter24hpmcounter25hpmcounter26hpmcounter27hpmcounter28hpmcounter29hpmcounter30hpmcounter31cyclehtimehinstrethhpmcounter3hhpmcounter4hhpmcounter5hhpmcounter6hhpmcounter7hhpmcounter8hhpmcounter9hhpmcounter10hhpmcounter11hhpmcounter12hhpmcounter13hhpmcounter14hhpmcounter15hhpmcounter16hhpmcounter17hhpmcounter18hhpmcounter19hhpmcounter20hhpmcounter21hhpmcounter22hhpmcounter23hhpmcounter24hhpmcounter25hhpmcounter26hhpmcounter27hhpmcounter28hhpmcounter29hhpmcounter30hhpmcounter31hfsflagsifsrmifsflagsfsrmfssrrdcyclerdtimerdinstretfrflagsfrrmfrsrbeqbnebltbgebltubgeufsgnj.fsgnjn.fsgnjx.fmv.fneg.fabs.flefltfeqfaddfsubfmulfdivrnertzrdnruprmmdynfmadd.fmsub.fnmsub.fnmadd.addwsllwsrlwsubwsrawmulwdivwdivuwremwremuwsllsltsltusrlsramulhmulhsumulhudivuremremu.rl.aq.aqrlamoaddamoswapamoxoramooramoandamominamomaxamominuamomaxufsqsbsltisltiuxoriunknownirirwioiowioriorwflqlblbulwuft0ft1ft2ft3ft4ft5ft6ft7fs0fs1fa0fa1fa2fa3fa4fa5fa6fa7fs2fs3fs4fs5fs6fs7fs8fs9fs10fs11ft8ft9ft10ft11gp@P@PppH K )I 1b7 N  S YGS 555555555l5<wdqsdqriscv_disasmmemory exhausted%s (%s) %s http://elfutils.org/2023Copyright (C) %s The elfutils developers <%s>. This is free software; see the source for copying conditions. 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